CppMem - An Overview

CppMem is an interactive tool for exploring the behaviour of small code snippets of the C++ memory model. It should, no it has to be in the tool box of each programmer, who deals seriously with the memory model.

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Relaxed Semantic

The relaxed semantic is the end of the Scala. The relaxed semantic is the weakest of all memory models and guarantees only, that the operations on atomic variables are atomic.

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Acquire-Release Fences

Acquire and release fences guarantees similar synchronisation and ordering constraints as atomics with acquire-release semantic. Similar, because the differences are in the details.

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Fences are Memory Barriers

The key idea of a std::atomic_thread_fence is, to establish synchronisation and ordering constraints between threads without an atomic operation.

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Acquire-Release Semantic - The typical Misunderstanding

A release operation synchronizes-with an acquire operation on the same atomic variable. So we can easily synchronise threads, if ... . Today's post is about the if.

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memory_order_consume

std::memory_order_consume is the most legendary of the six memory models. That's for two reasons. At one hand, std::memory_order_consume is extremely hard to get. At the other hand - that may change in the future - no compiler supports it.

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100 Posts Anniversary - Quo vadis Modernes C++?

As you may know, I translate in this blog the posts from my German blog into English. My German blog has the 100 posts anniversary. So I started a poll for the next new main topic.

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Transitivity of the Acquire-Release Semantic

A release operation synchronises with an acquire operation on the same atomic variable and establishes, in addition, an ordering constraints. These are the components to synchronise threads in a performant way, in case they act on the same atomic. But how can that work, if two threads share no atomic variable? We want no sequential consistency because that is too heavy. We want the light acquire-release semantic.

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Acquire-Release Semantic

With the acquire-release semantic the memory model gets very thrilling. Because now, we have not to reason about the synchronisation of threads, now we have to reason about the synchronisation of the same atomic in different threads.

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